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Last Modified: October 11, 2006
Many of the articles below have been made available in PDF format for easy access. Please be aware that all articles are copyrighted by the corresponding publisher.
Publications
Reports
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A. B. Kahng and R. Sharma, "Studies of Clustering Objectives and Heuristics
for Improved Standard-Cell Placement" (.ps),
(.pdf)
January 1997.
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A. B. Kahng, S. Muddu and R. Sharma, "Studies of Interconnect Tuning for
High-Performance Designs" (.ps),
(.pdf)
April 1997.
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A. E. Caldwell, A. B. Kahng and I. L. Markov, "Optimal End-Case Partitioners
and Placers for Standard-Cell Layout"
(.ps), (.pdf)
March 1999.
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A. B. Kahng, S. Muddu and D. Vidhani, "Noise and Delay Estimation for Coupled
RC Interconnects" (.ps)
(.pdf)
March 1999.
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A. E. Caldwell, A. B. Kahng and I. L. Markov, "Design and implementation of
move-based partitioners" (.ps),
(.pdf)
March 1999.
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A. Kennings and I. L. Markov, "Analytic Placement of Hypergraphs - I"
(.ps),
(.pdf) TR-990020, March 1999.
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A. E. Caldwell and I. L. Markov, "Hierarchical Whitespace Allocation",
(.ps),
(.pdf)
TR-200002, January 2000.
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R. Ellis, A. B. Kahng, Y. Zheng, "JBIG Compression Algorithms
for "Dummy Fill" VLSI Layout Data",(.ps),
(.pdf)
CS2002-0709, June 2002.
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A. B. Kahng, I. Markov, S. Reda, "A Placement Methodology for Global
Interconnect Reduction and Its Impact on Performance", (.pdf) CS2004-0801, Nov. 2004.
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N. P. Jouppi, A. B. Kahng, N. Muralimanohar and V. Srinivas,
"CACTI-IO Technical Report", (.pdf) CS2012-0986, Aug. 2012.
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A. B. Kahng, B. Lin and S. Nath,
"Comprehensive Modeling Methodologies for NoC Router Estimation", (.pdf) CS2012-0989, Sep. 2012.
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