UCSD VLSI CAD LABORATORY














Last Modified: October 11, 2006
GSRC T2 Circuit Fabrics Thrust: The Calibrating Achievable Design Theme
o System-Level Interconnect Modeling

o Three Initiatives Toward Calibrating Achievable Design: CAD-IP Reuse (via the GSRC Bookshelf), Technology Extrapolation, and Metrics

o CAD-IP Reuse (via the GSRC Bookshelf)

GTX: The GSRC Technology Extrapolation System (GTX)

o Metrics

o Slides presented by Kurt Keutzer at the September 23th GSRC Executive Advisory Group meeting (ppt)

o Slides presented at the theme summary, September 25th morning session at the Sept. 24-25 GSRC Workshop (ppt)

o Overview slides presented at Dec. 10 1999 GSRC Review session. (ppt)

o Article from EE Times: "Giga-center redefines chip design for new millennium"

o GSRC workshop presentation archive.

o Posters for Sep. 18 2003 GSRC Annual Symposium are available. link