Last Modified: October 11, 2006
Many of the articles below have been made available in PDF format for easy access. Please be aware that all articles are copyrighted by the corresponding publisher.
  1. A. B. Kahng and R. Sharma, "Studies of Clustering Objectives and Heuristics for Improved Standard-Cell Placement" (.ps), (.pdf) January 1997.
  2. A. B. Kahng, S. Muddu and R. Sharma, "Studies of Interconnect Tuning for High-Performance Designs" (.ps), (.pdf) April 1997.
  3. A. E. Caldwell, A. B. Kahng and I. L. Markov, "Optimal End-Case Partitioners and Placers for Standard-Cell Layout" (.ps), (.pdf) March 1999.
  4. A. B. Kahng, S. Muddu and D. Vidhani, "Noise and Delay Estimation for Coupled RC Interconnects" (.ps) (.pdf) March 1999.
  5. A. E. Caldwell, A. B. Kahng and I. L. Markov, "Design and implementation of move-based partitioners" (.ps), (.pdf) March 1999.
  6. A. Kennings and I. L. Markov, "Analytic Placement of Hypergraphs - I" (.ps), (.pdf) TR-990020, March 1999.
  7. A. E. Caldwell and I. L. Markov, "Hierarchical Whitespace Allocation", (.ps), (.pdf) TR-200002, January 2000.
  8. R. Ellis, A. B. Kahng, Y. Zheng, "JBIG Compression Algorithms for "Dummy Fill" VLSI Layout Data",(.ps), (.pdf) CS2002-0709, June 2002.
  9. A. B. Kahng, I. Markov, S. Reda, "A Placement Methodology for Global Interconnect Reduction and Its Impact on Performance", (.pdf) CS2004-0801, Nov. 2004.
  10. N. P. Jouppi, A. B. Kahng, N. Muralimanohar and V. Srinivas, "CACTI-IO Technical Report", (.pdf) CS2012-0986, Aug. 2012.
  11. A. B. Kahng, B. Lin and S. Nath, "Comprehensive Modeling Methodologies for NoC Router Estimation", (.pdf) CS2012-0989, Sep. 2012.