SAN JOSE, Calif. — The U.S. will pour
$100 million into two research programs over the next four years to
create the equivalent of a silicon compiler aimed at significantly
lowering the barriers to design chips. The programs, involving 15
companies and more than 200 researchers, were described for the
first time in a talk at the Design
Automation Conference here.
The two programs are just part of the Electronics Resurgence
expected to receive $1.5 billion over the next five years to drive
the U.S. electronics industry forward. ERI will disclose details of
its other programs at an
event in Silicon Valley in late July.
Congress recently added $150 million per year to ERI’s funding.
The initiative, managed by the Defense Advanced Research Projects
Agency (DARPA), announced on Monday that the July event will also
include workshops to brainstorm ideas for future research programs
in five areas ranging from artificial intelligence to photonics.
ERI used the stage of DAC to whet the industry’s appetite with
what it is doing in areas related to EDA. The July event will be a
coming-out party for projects in materials and chip
With $100 million in finding, the IDEAS and POSH programs
represent “one of the biggest EDA research programs ever,” said
Andreas Olofsson, who manages the two programs.
Together, they aim to combat the growing complexity and cost of
designing chips, now approaching $500 million for a bleeding-edge
SoC. Essentially, POSH aims to create an open-source library of
silicon blocks, and IDEAS hopes to spawn a variety of open-source
and commercial tools to automate testing of those blocks and
knitting them into SoCs and printed circuit boards.
If successful, the programs “will change the economics of the
industry,” enabling companies to design in relatively low-volume
chips that would be prohibitive today. It could also open a door for
designers working under secure regimes in the government to make
their own SoCs targeting nanosecond latencies that are not
commercially viable, said Olofsson.
“Most importantly, we have to change the culture of hardware
design. Today, we don’t have open sharing … but in software, it’s
already happened with Linux. Sharing software costs was the best
option for the industry, and we can share some hardware components,
Olofsson called for embedding more expertise directly in design
tools. The programs’ goals embrace more automated digital and analog
tools for both chips and boards.
“I’ve designed a few boards and found it excruciating,” he said.
“[Board designs quickly] explode into hundreds of details you have
to worry about in resistors, capacitors, board size … and there are
no optimization tools, so often, you have a sub-optimal solution.
Given the number of boards designed every year, the upside here is
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