Fill related papers and Survey

Our work:

1. Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, "Monte-Carlo Algorithms for Layout Density Control",  Proc. Asia and South Pacific Design Automation Conf., Jan. 2000, pp. 523-528.  ( ASPDAC00.pdf )

2. Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, "Practical Iterated Fill Synthesis for CMP Uniformity",  Proc. ACM/IEEE Design Automation Conf., June 2000, pp. 671-674. ( DAC00.pdf )

3. Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, "Hierarchical Dummy Fill for Process Uniformity",  Proc. Asia and South Pacific Design Automation Conf., Jan. 2001, pp. 139-144.  ( ASPDAC01.pdf )

4. Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, "Monte-Carlo Methods for Chemical-Mechanical Planarization on Multiple-Layer and Dual-Material Models",  SPIE Conference on Design and Process Integration for Microelectronic Manufacturing, Santa Clara, March 2002, pp. 421-432. ( SPIE02.pdf )

5.  Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, "Closing the Smoothness and Uniformity Gap in Area Fill Synthesis",  Proc. ACM/IEEE Intl. Symp. on Physical Design, April 2002, pp. 137-142. ( ISPD02.pdf)

6. Y. Chen, A. B. Kahng, G. Robins and A. Zelikovsky, "Area Fill Synthesis for Uniform Layout Density",  IEEE Trans. on Computer-Aided Design, 21(10) (2002), pp. 1132-1147. ( TCAD02.pdf )

MIT papers:

 

1. D. Ouma, C. Oji, D. Boning, J. Chung, D. Hetherington, and P. Merkle, "Effect of High Relative Speed on Planarization Length in Oxide Chemical Mechanical Polishing," 1998 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), Santa Clara, Feb. 1998. ( PMIC98.ps )

2. V. Mehrotra, S. Nassif, D. Boning, and J. Chung, "Modeling the Effects of Manufacturing Variation on High-Speed Microprocessor Interconnect Performance," 1998 International Electron Devices Meeting, San Francisco. CA, Dec. 1998. ( IEDM98.pdf )

3.  Stine, B., D. Ouma, R. Divecha, D. Boning, J. Chung, D. Hetherington, I. Ali, G. Shinn, J. Clark, O. Nakagawa, S-Y Oh., ''A Closed-Form Analytic Model for ILD Thickness Variation in CMP Processes,'' 1997 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), p. 266, Santa Clara, February, 1997. ( PMIC97.stine.pdf )

4.  D. Boning, B. Lee, T. Tubawa, and T. Park, "Models for Pattern Dependencies: Capturing Effects in Oxide, STI, and Copper CMP," Semicon/West Technical Symposium: CMP Technology for ULSI Manufacturing,, San Francisco, CA, July 2001. ( SemiconWest2001.pdf )

5. B. Stine, D. Ouma, R. Divecha, D. Boning, J. Chung, ''Rapid Characterization and Modeling of Pattern Dependent Variation in Chemical Mechanical Polishing,'' IEEE Trans. Semi. Manuf., vol. 11, no. 1, pp. 129-140, Feb. 1998. ( Stine-rapid-cmp.pdf )

6. T. Tugbawa, T. Park, D. Boning, T. Pan, P. Li, S. Hymes, T. Brown, and L. Camilletti, "A Mathematical Model of Pattern Dependencies in Cu CMP Processes," CMP Symposium, Electrochemical Society Meeting, Honolulu, HA, Oct. 1999. ( ecs99_paper_tugbawa.pdf )

 

Motorola's work:

 

1. W. Grobman, M. Thompson, R. Wang, C. Yuan, R. Tian, and E. Demircan, 'Reticle enhancement technology: Implications and challenges for physical design,' in Proc. Design Automation Conf., Las Vegas, NV, 2001, pp. 73~78. ( GROB-37D.PDF )

2.  R. Tian, X. Tang, and D. F. Wong, 'Dummy feature placement for chemical Mechanical polishing uniformity in a shallow trench isolation process,' in Int. Symp. Physical Design, Apr. 2001. ( WongISPD2001.pdf )

3.  R. Tian, D. Wong, and R. Boone, “Model-based dummy feature placement for oxide chemical–mechanical polishing manufacturability,” in Proc. Design Automation Conf., June 2000, pp. 667~670. ( WongDAC00.pdf )

Industry Survey

Industry Fill Tools Summary DAC 2002. ( Industry_Survey.pdf )