Research
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Publications

  • Author lists are in alphabetical order in all publications with my advisor Prof. Andrew B. Kahng.
  • All papers are copyrighted by the organization responsible for the corresponding conference or journal.

Ph.D. Dissertation

  • P. Sharma, "Manufacturing-Aware Physical Design Techniques," University of California, San Diego, 2007. [PDF]

Conference Papers

  1. L. Carloni, A. B. Kahng, S. Muddu, A. Pinto, K. Samadi and P. Sharma, "Interconnect Modeling for Improved System-Level Design Optimization," Proc. Asia and South Pacific Design Automation Conf., to appear, 2008 (ASPDAC08).
  2. A. B. Kahng, P. Sharma and R. O. Topaloglu, "Exploiting STI Stress for Performance," Intl. Conf. on Computer-Aided Design, pp. 83-90, 2007 (ICCAD07).
  3. A. B. Kahng, S. Muddu and P. Sharma, "Detailed Placement for Leakage Reduction using Systematic Through-Pitch Variation," Intl. Symp. on Low Power Electronics and Design, pp. 110 - 115, 2006 (ISLPED07).
  4. A. B. Kahng, S. Reda and P. Sharma, "On-Line Adjustable Buffering for Runtime Power Reduction," Intl. Symp. on Quality Electronic Design, pp. 550-555, 2007 (ISQED07). [PS] [PDF]
  5. A. B. Kahng, P. Sharma and A. Zelikovsky, "Fill for Shallow Trench Isolation CMP," Intl. Conf. on Computer-Aided Design, pp. 661-668, 2006 (ICCAD06). [PS] [PDF]
  6. A. B. Kahng, S. Muddu and P. Sharma, "Impact of Gate-Length Biasing on Threshold-Voltage Selection," Intl. Symp. on Quality Electronic Design, pp. 747- 754, 2006 (ISQED06). [PS] [PDF]
  7. A. B. Kahng, K. Samadi and P. Sharma, "Study of Floating Fill Impact on Interconnect Capacitance," Intl. Symp. on Quality Electronic Design, pp. 691- 696, 2006 (ISQED06). [PS] [PDF]
  8. A. B. Kahng, C.-H. Park, P. Sharma and Q. Wang, "Lens Aberration Aware Timing-Driven Placement," Proc. Design Automation and Testing in Europe, pp. 890-895, 2006 (DATE06). [PS] [PDF]
  9. P. Gupta, A. B. Kahng, S. Nakagawa, S. Shah and P. Sharma, "Lithography Simulation-Based Full-Chip Design Analyses," Proc. SPIE Conf. on Design and Process Integration for Microelectronic Manufacturing, pp. 61560T-1 -- 61560T-8, 2006 (SPIE06). [PS] [PDF]
  10. A. B. Kahng, S. Muddu and P. Sharma, "Defocus-Aware Leakage Estimation and Control," Proc. Intl. Symp. on Low Power Electronics and Design, pp. 263 - 268, 2005 (ISLPED05). [PS] [PDF]
  11. P. Gupta, A. B. Kahng, P. Sharma, "A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology," Proc. IEEE Intl. Symp. on Quality Electronic Design, pp. 421-426, 2005 (ISQED05). [PS] [PDF]
  12. P. Gupta, A. B. Kahng, C.-H. Park, P. Sharma, D. Sylvester and J. Yang, "Joining the Design and Mask Flows for Better and Cheaper Masks," INVITED Proc. 24th BACUS Symp. on Photomask Technology and Management, pp. 318-329, 2004 (SPIE04). [PS] [PDF]
  13. P. Gupta, A. B. Kahng, P. Sharma and D. Sylvester, "Selective Gate-Length Biasing for Cost-Effective Runtime Leakage Control," ACM/IEEE Proc. of Design Automation Conf., pp. 327-330, 2004 (DAC04). [PS] [PDF]
  14. P. Gupta, A. B. Kahng, I. Mandoiu and P. Sharma, "Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage," IEEE Proc. of Intl. Conf. on Computer Aided Design, pp. 754-759, 2003 (ICCAD03). [PS] [PDF]
  15. P. Sharma, A. Parashar, S. Banerjee and P. Kalra, "An Uncalibrated Lightfield Acquisition System," Indian Conference on Computer Vision, Graphics and Image Processing, 2002 (ICVGIP02). [PS] [PDF]

Journal Articles

  1. A. B. Kahng, P. Sharma and R. O. Topaloglu, "Chip Optimization Through STI Stress-Aware Placement Perturbations and Fill Insertion," IEEE Transactions on Computer-Aided Design, to appear, 2008 (TCAD08).
  2. A. B. Kahng, S. Muddu and P. Sharma, "Defocus-Aware Leakage Estimation and Control,” IEEE Transactions on Computer-Aided Design, vol. 27, no. 2, pp. 230-240, 2008 (TCAD08).
  3. P. Gupta, A. B. Kahng, P. Sharma and D. Sylvester, "Gate-Length Biasing for Runtime Leakage Control," IEEE Transactions on Computer-Aided Design, vol. 25, no. 8, pp. 1475-1485, 2006 (TCAD06).
  4. P. Gupta, A. B. Kahng, I. I. Mandoiu and P. Sharma, "Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage," IEEE Trans. on Computer-Aided Design, vol. 24, no. 7, pp. 1104-1114, 2005 (TCAD05). [PS] [PDF]
  5. P. Sharma, A. Parashar, S. Banerjee and P. Kalra, "An Uncalibrated Lightfield Acquisition System," Journal of Image and Vision Computing, Elsevier Publications, Vol. 22, pp. 1197-1202, 2004 (JIVC04). [PS] [PDF]

Patents and Applications

  1. A. B. Kahng and P. Sharma, "Internet Telephony through Hosts," assigned to University of California San Diego.
  2. P. Gupta, A. B. Kahng, S. Shah and P. Sharma, "System and Method for Standard-Cell Library Optimization".
  3. P. Gupta, A. B. Kahng, S. Muddu and P. Sharma, "Method and System for Topography-Aware Integrated Circuit Design Analysis and Optimization".
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Last Modified: May 13, 2008 19:56