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The team behind APlace, a large-scale placer software
package used in the integrated-circuit design process,
recently turned to the Rocks group at the San Diego
Supercomputer Center (SDSC) for last-minute compute power so
they could test and tune their software for a performance
contest. The five-day contest, sponsored by IBM’s Austin
Research Lab and the International Symposium on Physical
Design, was run on industrial designs with up to millions of
placeable components, reflecting the design challenges of
tomorrow’s complex systems-on-chip.
In response to the APlace team’s request, the Rocks group
retargeted machines in SDSC’s CyLab (the Cyberinfrastructure
Partnership (CIP) testbed), allowing the APlace team to meet
its high-memory and CPU cycle requirements. Within 24 hours,
Rocks software enabled the integration and delivery of a
cluster to the APlace team, providing them with the
high-performance compute power necessary for success.
As a result of the Rocks team’s efforts, the APlace team
won the performance contest, beating competitors on all
benchmarks. The increased compute power allowed APlace to meet
its goals of building a new placer with scalable, robust and
high-quality implementation.
“The help of the Rocks team was essential to our ability to
compete – let alone win – this competition,” said Andrew
Kahng, Professor of Computer Science and Engineering, and of
Electrical and Computer Engineering, at the University of
California San Diego (UCSD). “With the increased compute power
provided by the Rocks team, the APlace team was able to
prevail decisively against other top-ranked universities and
research groups from around the world, including several
well-resourced groups with decades of experience.”
For more information on the contest or the APlace
technology, please visit http://vlsicad.ucsd.edu/.
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