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UCSD VLSI CAD LABORATORY
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Andrew B. Kahng
Professor of CSE and ECE
Computer Science and Engineering Dept
Electrical and Computer Engineering Dept University of California, San Diego San Diego, CA 92093-0114
Phone: (858) 822-4884 Areas of Interestalgorithms and methodologies for the computer-aided physical design of VLSI circuits, performance analysis of circuits and interconnects, computational geometry, discrete algorithms, combinatorial optimization, and the structural theory of large-scale global optimizations
Biographical SketchAndrew B. Kahng (b. Oct. 1963, San Diego, CA) received the A.B. degree in applied mathematics (physics) from Harvard College, and from June 1983 to June 1986 was affiliated with Burroughs Corporation Micro Components Group in San Diego, where he worked in device physics, circuit simulation, and CAD for VLSI layout. He received the M.S. and Ph.D. degrees in computer science from the University of California at San Diego. He joined the UCLA computer science department as an assistant professor in July 1989, and became associate professor effective July 1994 and professor effective July 1998. From April 1996 through September 1997, he was on sabbatical leave and leave of absence from UCLA, as Visiting Scientist at Cadence Design Systems, Inc. He resumed his duties at UCLA in Fall 1997, and from July 1998 to September 2000 served as the computer science department's vice-chair for graduate studies. Effective January 1, 2001 Professor Kahng is joining UCSD as a Professor in the CSE and ECE Departments. He currently has many active working relationships with industry.Professor Kahng has received NSF Research Initiation and Young Investigator awards, 7 Best Paper nominations, and 2 Best Paper awards (DAC, ISQED). He was the founding General Chair of the 1997 ACM/IEEE International Symposium on Physical Design, co-founder of the ACM Workshop on System-Level Interconnect Prediction, and defined the physical design roadmap as a member of the Design Tools and Test technical working group (TWG) for the 1997, 1998, 1999 and 2000 renewals of the SIA Technology Roadmap for Semiconductors (starting in 1999 - the Design TWG of the International Technology Roadmap for Semiconductors). He has also served as a member of the EDA Council's EDA 200X task force. Currently, he is Chair of the U.S. Design TWG and the international Design ITWG for the 2001 renewal of the International Technology Roadmap for Semiconductors, and is the General Chair of EDP-2002 (the Electronic Design Processes symposium of the IEEE DATC). He is also on the steering committees of ISPD-2001 and SLIP-2001. Professor Kahng's research interests include VLSI physical layout design and performance analysis, combinatorial and graph algorithms, stochastic global optimization, and the optimization foundations of computational commerce.
ResearchProfessor Kahng's research interests include algorithms and methodologies for the computer-aided physical design of VLSI circuits, performance analysis of circuits and interconnects, computational geometry, discrete algorithms, combinatorial optimization, and the structural theory of large-scale global optimizations. He also has interests in networking-related problems, as well as the combinatorial optimization foundations of computational commerce.
Selected Talks
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