UCSD VLSI CAD LABORATORY














Andrew B. Kahng
Professor of CSE and ECE
Computer Science and Engineering Dept
Electrical and Computer Engineering Dept
University of California, San Diego
San Diego, CA 92093-0114

Phone: (858) 822-4884
Fax: (858) 534-7029
Email: abk@cs.ucsd.edu
Office: 3802 APM, UCSD

Home page of Andrew Kahng

Areas of Interest

algorithms and methodologies for the computer-aided physical design of VLSI circuits, performance analysis of circuits and interconnects, computational geometry, discrete algorithms, combinatorial optimization, and the structural theory of large-scale global optimizations

Biographical Sketch

Andrew B. Kahng (b. Oct. 1963, San Diego, CA) received the A.B. degree in applied mathematics (physics) from Harvard College, and from June 1983 to June 1986 was affiliated with Burroughs Corporation Micro Components Group in San Diego, where he worked in device physics, circuit simulation, and CAD for VLSI layout. He received the M.S. and Ph.D. degrees in computer science from the University of California at San Diego. He joined the UCLA computer science department as an assistant professor in July 1989, and became associate professor effective July 1994 and professor effective July 1998. From April 1996 through September 1997, he was on sabbatical leave and leave of absence from UCLA, as Visiting Scientist at Cadence Design Systems, Inc. He resumed his duties at UCLA in Fall 1997, and from July 1998 to September 2000 served as the computer science department's vice-chair for graduate studies. Effective January 1, 2001 Professor Kahng is joining UCSD as a Professor in the CSE and ECE Departments. He currently has many active working relationships with industry.

Professor Kahng has received NSF Research Initiation and Young Investigator awards, 7 Best Paper nominations, and 2 Best Paper awards (DAC, ISQED). He was the founding General Chair of the 1997 ACM/IEEE International Symposium on Physical Design, co-founder of the ACM Workshop on System-Level Interconnect Prediction, and defined the physical design roadmap as a member of the Design Tools and Test technical working group (TWG) for the 1997, 1998, 1999 and 2000 renewals of the SIA Technology Roadmap for Semiconductors (starting in 1999 - the Design TWG of the International Technology Roadmap for Semiconductors). He has also served as a member of the EDA Council's EDA 200X task force. Currently, he is Chair of the U.S. Design TWG and the international Design ITWG for the 2001 renewal of the International Technology Roadmap for Semiconductors, and is the General Chair of EDP-2002 (the Electronic Design Processes symposium of the IEEE DATC). He is also on the steering committees of ISPD-2001 and SLIP-2001. Professor Kahng's research interests include VLSI physical layout design and performance analysis, combinatorial and graph algorithms, stochastic global optimization, and the optimization foundations of computational commerce.

Research

Professor Kahng's research interests include algorithms and methodologies for the computer-aided physical design of VLSI circuits, performance analysis of circuits and interconnects, computational geometry, discrete algorithms, combinatorial optimization, and the structural theory of large-scale global optimizations. He also has interests in networking-related problems, as well as the combinatorial optimization foundations of computational commerce.

Selected Talks

  • "On Structure and Scaling in Optimization", May 17, 1991, Jacob Marschak Interdisciplinary Colloquium on Mathematics in the Social Sciences, abstract published in Mathematical Social Sciences 22 (1991), pp. 182-183.
  • "New Spectral Methods for Ratio Cut Partitioning and Clustering", May 29, 1991, UC Irvine ECE Department Colloquium.
  • "Issues in Performance-Driven Interconnection", July 31, 1991, Southern California VLSI CAD Colloquium, held at UC Irvine ICS Department.
  • "On Circuit Partitioning and the Intrinsic Rent Parameter", April 13, 1992, VLSI Colloquium, UC Berkeley EECS Department.
  • "On Cost Surfaces and Stochastic Hill-Climbing Variants", invited talk, April 29, 1992, ORSA Annual Meeting, Orlando.
  • "How to Partition a Circuit", May 14, 1992, UC Santa Cruz Computer Engineering Department Colloquium.
  • "On the Effective Design of High-Performance Routing Trees", April 12, 1993, VLSI Colloquium, UC Berkeley EECS Department.
  • "New Directions in Practical Large-Scale Optimization", May 3, 1993, VLSI Colloquium, UC Berkeley EECS Department; June 22, 1993, UC Santa Cruz Computer Engineering Department Colloquium. Also: Colloquium talks at UCSD Computer Science and Engineering Dept. (April 1994), UCLA Computer Science Dept. (May 1994), UCSB ECE Dept. (October 1994), Northwestern Univ. EECS Dept. (April 1995), etc.
  • "Parallel Dynamic Adaptive Search Algorithms", July 9, 1993, Mathematical Programming Society Symposium on Parallel Optimization, Madison WI.
  • "New Ideas in Finite-Time Global Optimization", invited talk, Dagstuhl-Seminar on Combinatorial Methods for Integrated Circuit Design, October 22-28, 1993, Schloss Dagstuhl, Germany.
  • "On Problem Structure and Amenability to Gradient Methods", invited talk, November 1, 1993, ORSA/TIMS National Meeting, Phoenix.
  • "Non-Monotone Strategies in Hill-Climbing Optimization", invited talk, November 2, 1993, ORSA/TIMS National Meeting, Phoenix.
  • "Parallel Dynamic Adaptive Search Algorithms", invited talk, TIMS/ORSA Joint National Meeting, Boston, April 24-27, 1994.
  • "Collective Action for Autonomous Robots", invited talk, May 9, 1995, U.S. Army Sensor Technology and Engineering Colloquium Series, Washington DC.
  • "Roadmaps Toward a Science of VLSI Design", invited plenary talk, May 13, 1996, VLSI CAD Track, IEEE Intl. Symposium on Circuits and Systems, Atlanta, May 1996. Also: Colloquium talk at University of Virginia Computer Science Dept. (December 1996).
  • "Futures and Core Algorithm Technologies for Physical Design", Distinguished Lecture Series, June 19, 1997, Cadence Design Systems, Inc, San Jose CA. Also: Colloquium talks at IBM Austin Research Laboratory (May 1997), University of Toronto EECG Dept. (June 1997), University of Waterloo Computer Science Dept. (June 1997), NASA Ames Research Center (July 1997), etc.
  • "Futures and Core Algorithm Technologies for Physical Design", Distinguished Lecture Talk, June 19, 1997.
  • "SIA Strategic Technology Council presentation" , January 24th, 2002.
  • "Michigan EECS Dept VLSI Seminar talk" , March 4th, 2002.
  • "ICCAD 2003 talk: Manufacturing Aware Physical Design" , November, 2003.